Title :
Implementation of an ATM layer chip for B-ISDN applications
Author :
Johnston, Cesar A. ; Chao, H. Jonathan
Author_Institution :
Bellcore, Morristown, NJ, USA
Abstract :
The application and architecture of an experimental research prototype application specific integrated circuit designed to serve as a generic building block of the future broadband ISDN (B-ISDN) are described. The chip performs common asynchronous transfer mode (ATM) layer functions such as cell assembly and cell disassembly. A media access control (MAC) protocol developed for a broadband customer premises network is also integrated in the chip. The chip operation modes are controlled through a microcontroller interface. The chip interfaces to the B-ISDN through a SOET STS-3c Framer chip. The ATM layer chip has been designed using 1.2-μm CMOS technology with a die area of 5.4 mm×5.4 mm and approximately 27000 transistors
Keywords :
CMOS integrated circuits; ISDN; application specific integrated circuits; broadband networks; data communication equipment; protocols; time division multiplexing; 1.2 micron; 1.2- mu m CMOS technology; ASIC; ATM layer chip; B-ISDN; MAC protocol; SOET STS-3c Framer chip; application specific integrated circuit; asynchronous transfer mode; broadband ISDN; broadband customer premises network; cell assembly; cell disassembly; media access control; microcontroller interface; Application specific integrated circuits; Assembly; Asynchronous transfer mode; B-ISDN; CMOS technology; Media Access Protocol; Payloads; Prototypes; SONET; TV;
Conference_Titel :
Communications, 1991. ICC '91, Conference Record. IEEE International Conference on
Conference_Location :
Denver, CO
Print_ISBN :
0-7803-0006-8
DOI :
10.1109/ICC.1991.162453
