Title :
VLSI implementations of ATM buffer management
Author :
Zukowski, Charles ; Pei, Tong-Bi
Author_Institution :
Dept. of Electr. Eng., Columbia Univ., New York, NY, USA
Abstract :
An architecture is introduced for a semi-shared buffer containing multiple FIFO (first in, first out) queues. The simple and fast FIFO stack approach is generalized to allow overlapping, leading to memory efficiencies similar to those of complex, fully shared architectures. A comparison is made of performance and VLSI implementation costs across the range of separated, semi-shared, and fully shared buffers
Keywords :
VLSI; buffer storage; queueing theory; time division multiplexing; ATM buffer management; FIFO stack; VLSI; first in first out queues; semishared buffer; Buildings; Clocks; Costs; Resource management; Tail; Traffic control; Very large scale integration;
Conference_Titel :
Communications, 1991. ICC '91, Conference Record. IEEE International Conference on
Conference_Location :
Denver, CO
Print_ISBN :
0-7803-0006-8
DOI :
10.1109/ICC.1991.162455
