A fully autonomous pulsed synchronous charge extractor for high-voltage piezoelectric harvesters

This paper presents a fully autonomous, self-adjusting pulsed synchronous charge extractor chip optimized for piezoelectric harvesters with an output voltage from 3V to 18V. The chip which has been fabricated in a 0.35 μm CMOS process is supplied exclusively by the buffer capacitor where the harvested energy is stored in. Due to the low power consumption, the chip can handle a minimum piezo output power of 30μW. The system performs a startup from an uncharged buffer capacitor and operates in the adaptive mode at storage buffer voltages from 1.4 V to 5V. The implementation of the improved switching technique increases the chip efficiency by up to 15% compared to the commonly used Synchronous Electric Charge Extraction technique and enables the chip efficiency to reach values of up to 90%.