Title :
Resistors layout for enhancing yield of R-2R DACs
Author :
Lin, Yu ; Geige, Randall
Author_Institution :
Dept. of Electr. & Comput. Eng., Iowa State Univ., Ames, IA, USA
Abstract :
A strategy to improve the yield of R-2R DACs by minimizing the effects of mismatch of resistors due to the local variations of sheet resistance is introduced. The approach is based on optimally distributing the area between the resistors. Simulation results show that the new strategy provides significant improvement in yield compared to the standard area allocation strategy of assigning equal area for each resistor bit-pair.
Keywords :
circuit layout CAD; circuit simulation; digital-analogue conversion; integrated circuit yield; R-2R DACs; local variations; mismatch; sheet resistance; simulation results; yield; Analog-digital conversion; Capacitance; Circuit simulation; Computational modeling; Distribution strategy; Electric resistance; Feedback amplifiers; Linearity; Resistors;
Conference_Titel :
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on
Print_ISBN :
0-7803-7448-7
DOI :
10.1109/ISCAS.2002.1010649
