Title :
Self-timed MOS current mode logic for digital applications
Author :
Anis, Mohab H. ; Elmasry, Mohamed I.
Author_Institution :
Dept. of Electr. & Comput. Eng., Waterloo Univ., Ont., Canada
Abstract :
This paper describes a Self-Timed MOS Current-Mode Logic (ST-MCML) for digital applications. The architecture and operation of ST-MCML is explained and analyzed. 4-bit ripple and 16-bit carry look ahead adders are implemented using the ST-MCML technique in a 0.18-μm, 1.8-V, 1-GHz CMOS process. ST-MCML is compared to conventional MCML, static CMOS and domino logic in terms of power, delay, Power-Delay-Product (PDP) and Energy-Delay-Product (EDP). ST-MCML achieves low-power values as well as minimum PDP and EDP values.
Keywords :
CMOS logic circuits; adders; carry logic; current-mode logic; delays; low-power electronics; 0.18 micron; 1 GHz; 1.8 V; 16 bit; 16-bit carry look ahead adders; 4 bit; 4-bit ripple adders; CMOS process; digital applications; energy-delay product; low power dissipation; power-delay product; self-timed MOS current mode logic; Adders; Application software; CMOS logic circuits; CMOS process; Delay; Logic devices; Power dissipation; Resistors; Very large scale integration; Voltage;
Conference_Titel :
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on
Print_ISBN :
0-7803-7448-7
DOI :
10.1109/ISCAS.2002.1010653
