DocumentCode :
1810578
Title :
Current reference scheme for multilevel phase-change memory sensing
Author :
Cabrini, A. ; Gallazzi, F. ; Torelli, G.
Author_Institution :
Dept. of Electron., Univ. of Pavia, Pavia, Italy
fYear :
2011
fDate :
12-16 Sept. 2011
Firstpage :
419
Lastpage :
422
Abstract :
This paper presents a current reference for read and verify operations in multilevel phase-change memories (PCMs). The circuit is able to track the temperature behaviour of the PCM cell current over a temperature range from -40°C to 80°C, as is necessary to meet the stringent requirements of multilevel PCM sensing. The proposed scheme is based on an MOS transistor biased in saturation below its zero temperature coefficient (ZTC) point. Only room temperature trimming at wafer sort is required to adjust the value and the temperature dependence of the generated current. Experimental results showed good agreement with experimental data on PCM cells. The error in the programmed temperature coefficient is kept within 10% in any process condition.
Keywords :
MOSFET; phase change memories; temperature sensors; MOS transistor; ZTC point; current reference scheme; multilevel PCM sensing; multilevel phase-change memory sensing; programmed temperature coefficient; temperature -40 degC to 80 degC; temperature 293 K to 298 K; temperature behaviour tracking; zero temperature coefficient point; Logic gates; Phase change materials; Temperature dependence; Temperature distribution; Temperature measurement; Temperature sensors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
ESSCIRC (ESSCIRC), 2011 Proceedings of the
Conference_Location :
Helsinki
ISSN :
1930-8833
Print_ISBN :
978-1-4577-0703-2
Electronic_ISBN :
1930-8833
Type :
conf
DOI :
10.1109/ESSCIRC.2011.6044996
Filename :
6044996
Link To Document :
بازگشت