CMOS dynamic comparators for pipeline A/D converters

Author

Sumanen, Lauri ; Waltari, Mikko ; Hakkarainen, Väinö ; Halonen, Kari

Author_Institution

Electron. Circuit Design Lab., Helsinki Univ. of Technol., Finland

Volume

5

fYear

2002

fDate

2002

Abstract

Three different CMOS dynamic comparator topologies for pipeline A/D converters, resistive divider, differential pair, and charge distribution comparators, are analyzed. The topologies considered are fully differential, i.e. both sensing and reference voltage inputs are balanced, consist only of a single stage, and feature zero DC power dissipation with a built-in threshold adjusting input stage. Test structures of the comparators, fabricated in 0.35-μm CMOS process, are measured to determine the offset properties of the compared topologies.

Keywords

CMOS integrated circuits; analogue-digital conversion; comparators (circuits); differential amplifiers; dividing circuits; low-power electronics; pipeline processing; 0.35 micron; CMOS; CMOS dynamic comparators; DC power dissipation; charge distribution comparators; differential pair; offset properties; pipeline A/D converters; reference voltage inputs; resistive divider; threshold adjusting input stage; CMOS technology; Circuit testing; Circuit topology; Electronic circuits; Energy consumption; Laboratories; Pipelines; Power dissipation; Threshold voltage; Voltage control;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on

Print_ISBN

0-7803-7448-7

Type

conf

DOI

10.1109/ISCAS.2002.1010664

Filename

1010664