Design of a 1.6GHz low phase noise oscillator

In this paper, a method is proposed to improve the phase noise characteristic of a 1.6 GHz oscillator(OSC) . It uses two capacitors which have a difference of an order of magnitude as power filters to reduce its phase noise. Moreover this paper uses a positive feedback microstrip line and implement the common-emitter(CE) configuration of the transistor to improve the OSC´s phase noise characteristic. The software ADS is used to simulate the OSC. Testing phase noise of the proposed OSC can reach -114.1 dBc/Hz/lMHz. Testing output power of its fundamental is 9.18 dBm. A satisfactory agreement is reached between simulating and testing results.