A study of cache hashing functions for symbolic applications in micro-parallel processors

Author

Su, Ching Long ; Teng, Chen-Chiu ; Despain, Alvin M.

Author_Institution

Adv. Comput. Archit. Lab., Univ. of Southern California, USA

fYear

1994

fDate

19-22 Dec 1994

Firstpage

530

Lastpage

535

Abstract

This paper presents a study of cache hashing functions for micro-parallel processors (e.g., superpipeline and super-scalar processors). Several novel cache hashing functions are experimented. Our simulation results show that an unconventional cache hashing function applied on a direct-mapped cache results in hit rates as good as a two-way set associative cache with traditional mapping, while the cache hit times are as fast as a direct-mapped cache with traditional mapping

Keywords

cache storage; parallel processing; resource allocation; storage management; cache hashing functions; direct-mapped cache; micro-parallel processors; super-scalar processors; superpipeline processors; symbolic applications; two-way set associative cache; Application software; Computational modeling; Computer architecture; Laboratories; Runtime; VLIW;

fLanguage

English

Publisher

ieee

Conference_Titel

Parallel and Distributed Systems, 1994. International Conference on

Conference_Location

Hsinchu

Print_ISBN

0-8186-6555-6

Type

conf

DOI

10.1109/ICPADS.1994.590367

Filename

590367

Link To Document

https://search.isc.ac/dl/search/defaultta.aspx?DTC=49&DC=1812691