DocumentCode
1812783
Title
ANFIS implementation in FPGA for power amplifier linearization with digital predistortion
Author
Zhai, Jianfeng ; Zhou, Jianyi ; Zhang, Lei ; Zhao, Jianing ; Hong, Wei
Author_Institution
State Key Lab. of Millimeter Waves, Southeast Univ., Nanjing
Volume
3
fYear
2008
fDate
21-24 April 2008
Firstpage
1474
Lastpage
1476
Abstract
This paper presents a hardware implementation of an adaptive neuro-fuzzy inference system (ANFIS) in FPGA for power amplifier linearization with digital predistortion. The proposed approach approximates the inverse AM/AM and AM/PM characteristic of power amplifiers (PA) with two equivalent ANFIS of a first-order Sugeno FIS. The parameters of the ANFIS are obtained by an offline training process with neural networks algorithms. The linearity performance of the power amplifier is improved significantly with this technique. Experimental results show that about 5 to 10 dB ACPR reduction could be achieved for 3.75 MHz 16-QAM signals.
Keywords
field programmable gate arrays; neural nets; power amplifiers; FPGA; adaptive neuro-fuzzy inference system; digital predistortion; neural network; power amplifier linearization; Adaptive systems; Field programmable gate arrays; Fuzzy systems; Hardware; Neural networks; Phase distortion; Polynomials; Power amplifiers; Predistortion; Table lookup;
fLanguage
English
Publisher
ieee
Conference_Titel
Microwave and Millimeter Wave Technology, 2008. ICMMT 2008. International Conference on
Conference_Location
Nanjing
Print_ISBN
978-1-4244-1879-4
Electronic_ISBN
978-1-4244-1880-0
Type
conf
DOI
10.1109/ICMMT.2008.4540724
Filename
4540724
Link To Document