Title :
A discrete algorithm for the regularization of hierarchical VHDL-AMS models
Author :
Mades, J. ; Schwarz, D. Estévez ; Glesner, M.
Author_Institution :
Infineon Technol., Munich, Germany
Abstract :
The powerful capability of VHDL-AMS to describe complex continuous systems in the form of differential algebraic equations (DAEs) often leads to problems during numerical simulation. This paper presents a discrete algorithm to analyze unsolvable DAE systems and to correct the underlying hierarchical VHDL-AMS description automatically in interaction with the designer, avoiding time-consuming manual error correction.
Keywords :
IEEE standards; application specific integrated circuits; circuit simulation; digital simulation; hardware description languages; integrated circuit design; mixed analogue-digital integrated circuits; network topology; IEEE standard; complex continuous systems; complex mixed SoC; differential algebraic equations; discrete algorithm; hierarchical VHDL-AMS models; numerical simulation; regularization; topology descriptions; Algorithm design and analysis; Character generation; Circuit simulation; Differential algebraic equations; Differential equations; Kirchhoff´s Law; Libraries; Linear matrix inequalities; Microelectronics; Power system modeling;
Conference_Titel :
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on
Print_ISBN :
0-7803-7448-7
DOI :
10.1109/ISCAS.2002.1010744
