DocumentCode
1812875
Title
Avoiding data link and computational conflicts in mapping nested loop algorithms to lower-dimensional processor arrays
Author
Xue, Jingling ; Lenders, Patrick
Author_Institution
Dept. of Math. Stat. & Comput. Sci., New England Univ., Armidale, NSW, Australia
fYear
1994
fDate
19-22 Dec 1994
Firstpage
567
Lastpage
572
Abstract
This paper describes a unified approach to checking data link and computational conflicts in mapping algorithms to lower-dimensional processor arrays. Based primarily on the notion of Hermite normal form, we propose a range of necessary and sufficient conditions to identify mappings without data link and computational conflicts. These conditions are then used to find optimal time mappings of a transitive closure algorithm to linear processor arrays
Keywords
concurrency control; parallel algorithms; parallel architectures; processor scheduling; computational conflicts; data link; lower-dimensional processor arrays; mapping algorithms; nested loop algorithms; optimal time mappings; transitive closure algorithm; Difference equations; Mathematics; Statistics; Sufficient conditions; Terminology; Testing;
fLanguage
English
Publisher
ieee
Conference_Titel
Parallel and Distributed Systems, 1994. International Conference on
Conference_Location
Hsinchu
Print_ISBN
0-8186-6555-6
Type
conf
DOI
10.1109/ICPADS.1994.590382
Filename
590382
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