Title :
Design and analysis of a double RESURF 700V LIGBT with quasi-vertical DMOSFET in junction isolation technology
Author :
Ying-Chieh Tsai ; Jeng Gong ; Chan, W.C. ; Wu, S.Y. ; Lien, C.H.
Author_Institution :
Macronix Int. Co. Ltd., Hsinchu, Taiwan
Abstract :
This paper presents the analysis of the substrate leakage current to anode current ratio of the 700V n-type lateral IGBT with quasi-vertical DMOSFET (QVDMOS) fabricated with junction isolation technology. To improve the substrate leakage, a p-type buried layer (BLP) is inserted between the n-type drift region and the n-type buried layer (BLN). A junction isolated p-region, which is connected to the BLP layer, is used to separate the N+ anode and the P+ anode. The measurement results show that this structure successfully eliminated the substrate current as well as to ensure high breakdown voltage. Furthermore, due to the use of the quasi-VDMOS cathode cell, additional current path enables a reduction in the forward voltage drop.
Keywords :
MOSFET; buried layers; insulated gate bipolar transistors; isolation technology; leakage currents; QVDMOS; double RESURF LIGBT; double reduced surface field; junction isolation technology; n-type buried layer; n-type drift region; n-type lateral IGBT; p-type buried layer; quasiVDMOS cathode cell; quasivertical DMOSFET; substrate leakage current to anode current ratio; voltage 700 V; Anodes; Cathodes; Current measurement; Insulated gate bipolar transistors; Junctions; Logic gates; Substrates;
Conference_Titel :
Power Semiconductor Devices & IC's (ISPSD), 2014 IEEE 26th International Symposium on
Conference_Location :
Waikoloa, HI
Print_ISBN :
978-1-4799-2917-7
DOI :
10.1109/ISPSD.2014.6855997