DocumentCode
181323
Title
On the feasibility of further improving Figure of Merits (FOM) of low voltage power MOSFETs
Author
Sabui, Gourab ; Shen, Z. John
Author_Institution
Dept. of Electr. & Comput. Eng., Illinois Inst. of Technol., Chicago, IL, USA
fYear
2014
fDate
15-19 June 2014
Firstpage
155
Lastpage
158
Abstract
A new low voltage power MOSFET concept termed the Junction Enhanced Trench Field Effect Transistor (JETFET) is proposed which combines the advantages of high cell density of trench MOSFET, low gate charge of LDMOS, and low drift region resistance of superjunction MOSFET. The JETFET concept was investigated using 2D process and device TCAD simulation. The feasibility of further improving the Figure of Merits (FOM) of power MOSFETs is demonstrated.
Keywords
power MOSFET; semiconductor device models; 2D process; FOM; JETFET; LDMOS; device TCAD simulation; drift region resistance; figure of merits; gate charge; junction enhanced trench field effect transistor; low voltage power MOSFET concept; superjunction MOSFET; trench MOSFET; Doping; Fabrication; Implants; Logic gates; Low voltage; MOSFET; Resistance;
fLanguage
English
Publisher
ieee
Conference_Titel
Power Semiconductor Devices & IC's (ISPSD), 2014 IEEE 26th International Symposium on
Conference_Location
Waikoloa, HI
ISSN
1943-653X
Print_ISBN
978-1-4799-2917-7
Type
conf
DOI
10.1109/ISPSD.2014.6855999
Filename
6855999
Link To Document