Title :
0.18um BCD technology with best-in-class LDMOS from 6 V to 45 V
Author :
Tsung-Yi Huang ; Wen-Yi Liao ; Ching-Yao Yang ; Chien-Hao Huang ; Yeh, Wang-Chi Vincent ; Chih-Fang Huang ; Kuo-Hsuan Lo ; Chien-Wei Chiu ; Tzu-Cheng Kao ; Hung-Der Su ; Kuo-Cheng Chang
Author_Institution :
Technol. Dev. Div., Richtek Technol. Corp., Hsin-Chu, Taiwan
Abstract :
We propose a novel nLDMOS structure and a design concept in BCD technology with the best-in-class performance. The drift profile is optimized and the multi-oxide in the drift region is adopted to approach the RESURF limit of on-resistance vs. BVdss characteristic (i.e., 36V DMOS has a Ron_sp of 20mohm-mm2 with a BVdss of 50V; 45V DMOS has a Ron_sp of 28mohm-mm2 with a BVdss of 65V). Moreover, this modification requires merely three extra masks in the Non-Epitaxy LV process to achieve this improvement. Therefore it is not only a high performance but also a low cost solution.
Keywords :
BIMOS integrated circuits; MOSFET; BCD technology; RESURF limit; drift profile; drift region; nLDMOS structure; nonepitaxy LV process; size 0.18 mum; two-step-oxide process; voltage 6 V to 45 V; Electric potential; Impact ionization; Integrated circuits; Logic gates; Performance evaluation; Periodic structures; Resistance;
Conference_Titel :
Power Semiconductor Devices & IC's (ISPSD), 2014 IEEE 26th International Symposium on
Conference_Location :
Waikoloa, HI
Print_ISBN :
978-1-4799-2917-7
DOI :
10.1109/ISPSD.2014.6856005