Title :
A low distortion MOS sampling circuit
Author :
Sonkusale, Sameer R. ; Van der Spiegel, Jan
Author_Institution :
Pennsylvania Univ., Philadelphia, PA, USA
Abstract :
This paper presents a sampling technique with reduced distortion for use in a sample-and-hold circuit for high resolution analog-to-digital converters and switched capacitor filters. The technique involves bootstrapping both the gate and the bulk terminal of the sampling switch to improve linearity. Circuit implementation and SPICE level simulation results are presented.
Keywords :
CMOS integrated circuits; SPICE; analogue-digital conversion; bootstrap circuits; circuit simulation; sample and hold circuits; switched capacitor filters; MOS sampling circuit; SPICE level simulation; analog-to-digital converters; bootstrapping; distortion; linearity; sample-and-hold circuit; switched capacitor filters; Analog-digital conversion; Circuit simulation; Filters; Linearity; MOS capacitors; SPICE; Sampling methods; Switched capacitor circuits; Switches; Switching circuits;
Conference_Titel :
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on
Print_ISBN :
0-7803-7448-7
DOI :
10.1109/ISCAS.2002.1010771
