Dominance based methodologies for multiple output CMOS combinational gates synthesis

The design of multiple output CMOS combinational gates is studied. Two innovative transistor interconnection structures, Δ and λ networks, are introduced to minimize multiple output functions at the switching level. The authors investigate a generalization of the dominance relationship that makes it possible to apply a dominant synthesis methodology to nondominant functions. Simulations have been performed to compare the results obtained by the specific dominant synthesis algorithm with those achieved by the traditional CMOS synthesis and by the general λ and Δ synthesis algorithm. While the dominant synthesis algorithm requires only a reduced number of syntheses for each edge, the general λ and Δ algorithm requires a larger number of syntheses to optimize each edge