• DocumentCode
    1813869
  • Title

    Towards balanced traffic distribution in NoCs using a highly adaptive path-based routing algorithm

  • Author

    Bahrebar, Poona ; Stroobandt, Dirk

  • Author_Institution
    Dept. of Electron. & Inf. Syst. (ELIS), Ghent Univ., Ghent, Belgium
  • fYear
    2013
  • fDate
    1-5 July 2013
  • Firstpage
    194
  • Lastpage
    201
  • Abstract
    With the continuously increasing number of cores, on-chip communication has gained a significant role in taking advantage of the multicore chips. Therefore, designing efficient routing algorithms is highly desirable to increase the performance of the Networks-on-Chip (NoC). In comparison with deterministic routing methods, adaptive routing offers better performance by evenly distributing the traffic over the network. Adaptive routing strategies try to avoid congested or malfunctioning areas by dynamically sending the packets through alternative paths based on the network´s congestion condition. The routing algorithm proposed in this paper is mainly based on Hamiltonian path-based strategies for multicast traffic. This method reaches a high degree of adaptiveness by exploiting the eligible minimal paths between the source and the destination. Imposing some restrictions in choosing the potential paths ensures a deadlock- and livelock-free algorithm without using virtual channels. Experimental results demonstrate that the proposed algorithm performs significantly better in terms of latency and power consumption compared to the other adaptive and non-adaptive algorithms. This efficiency is achieved by alleviating congestion across the network.
  • Keywords
    concurrency control; microprocessor chips; multicast communication; multiprocessing systems; network routing; network-on-chip; performance evaluation; power aware computing; Hamiltonian path-based strategies; NoC performance; adaptive path-based routing algorithm; adaptive routing strategies; balanced traffic distribution; deadlock-free algorithm; deterministic routing methods; livelock-free algorithm; multicast traffic; multicore chips; network congestion condition; networks-on-chip performance; nonadaptive algorithms; on-chip communication; power consumption; routing algorithms; virtual channels; Adaptive systems; Algorithm design and analysis; DH-HEMTs; Partitioning algorithms; Routing; System recovery; System-on-chip; Adaptive Routing; Congestion; Multicast; Network-on-Chip (NoC); Path-based Routing Algorithms;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    High Performance Computing and Simulation (HPCS), 2013 International Conference on
  • Conference_Location
    Helsinki
  • Print_ISBN
    978-1-4799-0836-3
  • Type

    conf

  • DOI
    10.1109/HPCSim.2013.6641413
  • Filename
    6641413