DocumentCode :
1813933
Title :
FracNoC: A fractal on-chip interconnect architecture for System-on-Chip
Author :
Chariete, A. ; Bakhouya, Mohamed ; Gaber, Jaafar ; Wack, Maxime
Author_Institution :
Univ. de Technol. de Belfort Montbeliard, Belfort, France
fYear :
2013
fDate :
1-5 July 2013
Firstpage :
213
Lastpage :
216
Abstract :
Sophisticated on-chip interconnects (OCIs) were recently proposed as a solution to non-scalable shared bus schemes for Systems-on-Chip (SoC) design and implementation. In this paper a new OCI architecture by adapting a fractal topology structure is introduced. Simulations were conducted to compare this topology with two common OCIs, 2D Mesh, and Torus, using a variety of traffic patterns. Results show that this fractal architecture achieves better performance while using little energy budget.
Keywords :
network-on-chip; FracNoC; OCI architecture; SoC design; energy budget; fractal architecture; fractal on-chip interconnect architecture; fractal topology structure; nonscalable shared bus schemes; on-chip interconnects; system-on-chip; Computer architecture; Fractals; Network topology; Routing; System-on-chip; Topology; Traffic control; Fractal structures; Network on Chip; Nirgam; System on Chip; performance evaluation; simulations;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
High Performance Computing and Simulation (HPCS), 2013 International Conference on
Conference_Location :
Helsinki
Print_ISBN :
978-1-4799-0836-3
Type :
conf
DOI :
10.1109/HPCSim.2013.6641416
Filename :
6641416
Link To Document :
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