Title :
Noise analysis of power/ground planes on PCB by SPICE-like simulator with model order reduction technique
Author :
KUBOTA, Hidemasa ; Kamo, Atsushi ; Watanabe, Takayuki ; Asai, Hideki
Author_Institution :
Fac. of Eng., Shizuoka Univ., Hamamatsu, Japan
Abstract :
With the progress of integration of circuits and PCBs (printed circuit boards), novel techniques have been required for verification of signal integrity. Noise analysis of the power/ground planes is one of the most important issues. This paper describes a high-speed simulator for PCBs which contain interconnects with nonlinear terminations. This simulator is based on the environmental tool ASSIST constructed for the development of circuit simulators, and is combined with PRIMA (passive reduced-order interconnect macromodeling algorithm). In this simulator, an efficient implementation of PRIMA is considered using a voltage-controlled current source (VCCS) model. Finally, this simulator is applied to analysis of the power/ground planes of simple PCBs, and the validity is verified.
Keywords :
SPICE; active networks; circuit simulation; interconnections; power supply circuits; printed circuit design; reduced order systems; ASSIST environmental tool; PCB integration; PCB power/ground planes; PRIMA; SPICE-like simulator; VCCS model; circuit integration; high-speed simulator; interconnect nonlinear terminations; model order reduction technique; noise analysis; passive reduced-order interconnect macromodeling algorithm; printed circuit boards; signal integrity verification; voltage-controlled current source model; Analytical models; Circuit simulation; Differential equations; Integrated circuit interconnections; Noise reduction; Power engineering and energy; Power system modeling; Printed circuits; RLC circuits; Voltage;
Conference_Titel :
Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on
Print_ISBN :
0-7803-7448-7
DOI :
10.1109/ISCAS.2002.1010787
