DocumentCode :
1814142
Title :
PNP SiGe: C HBT Optimization in a Low-Cost CBiCMOS Process
Author :
Knoll, D. ; Heinemann, B. ; Yamamoto, Y. ; Wulf, H.-E. ; Schmidt, D.
Author_Institution :
IHP, Frankfurt
fYear :
2007
fDate :
Sept. 30 2007-Oct. 2 2007
Firstpage :
30
Lastpage :
33
Abstract :
We present results of pnp transistor optimization in a low-cost, complementary SiGe:C BiCMOS process. A particular goal was to provide well matched parameters of pnp and npn devices. A high pnp transistor current gain of 100 was reached without compromising the LF noise behavior. Two types of pnp transistors are presented showing BVCEO values of 3.3 V and 4.5 V, respectively, a (BVCEO times fT) product in excess of 260 VGHz, fmax values up to 105 GHz, and a minimum noise figure of 1.2 dB at 5 GHz. These pnp data fit well to the data of the medium-voltage npn transistors also available in this CBiCMOS process.
Keywords :
BiCMOS integrated circuits; Ge-Si alloys; heterojunction bipolar transistors; semiconductor materials; HBT optimization; LF noise behavior; low-cost CBiCMOS process; medium-voltage npn transistor optimization; transistor current gain; voltage 3.3 V; BiCMOS integrated circuits; Circuit noise; Germanium silicon alloys; Heterojunction bipolar transistors; Implants; Low-frequency noise; Medium voltage; Noise figure; Radio frequency; Silicon germanium; CBiCMOS technology; LF noise; PNP heterojunction bipolar transistors; RF noise;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Bipolar/BiCMOS Circuits and Technology Meeting, 2007. BCTM '07. IEEE
Conference_Location :
Boston, MA
ISSN :
1088-9299
Print_ISBN :
978-1-4244-1019-4
Electronic_ISBN :
1088-9299
Type :
conf
DOI :
10.1109/BIPOL.2007.4351832
Filename :
4351832
Link To Document :
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