Investigation of anomalous relation for HCI-induced abrupt VT fall-off and gate-oxide destruction with Ig-Vg curves in LD-PMOSFETs

The correlation of the current-voltage curve for the gate (Ig-Vg) with fatal events (abrupt fall-off of threshold voltage (VT) and subsequent gate-oxide destruction) under hot carrier stress in a lateral diffused PMOS transistor with shallow trench isolation (STI) is experimentally investigated. Time to failure caused by these events becomes shortest long before Ig reaches its first peak. In this region of small Vg stress, electrons trapped in a gate oxide above a drain-side channel cause an abrupt fall-off of VT due to the hot-electron-induced punch-through effect. A stronger electric field combined with the more numerous hot electrons it produces makes the substrate hot electron effect more influential, resulting in earlier destruction near the top edge of the STI. In contrast, in the region of large stress Vg where a substantial Ig due to Kirk effect is seen, these fatal events are not detected since much of Ig flows through the STI rather than the gate oxide.