Title :
A novel bi-directional high voltage PMOS with trench gate structure (Waveform Depletion MOS: WDMOS) for 65V HVICs
Author :
Tanaka, Kiyoshi ; Mori, Takayoshi ; Yoshida, Kenta ; Nitta, Tom ; Ipposhi, Takashi ; Maegawa, Shigeto
Author_Institution :
Mixed Signal Device Technol. Dept., Renesas Electron. Corp., Hitachinaka, Japan
Abstract :
In this paper, we propose a new bi-directional high voltage PMOSFET that improves a back-gate bias effect due to WDMOS (Waveform Depletion MOS) structure. In WDMOS structure, plural trench gates are adjacent each other. Therefore, the silicon between trench gates is easily depleted and a back-gate bias effect can be suppressed. We present excellent characteristics of the bi-directional high voltage PMOSFET with WDMOS structure.
Keywords :
elemental semiconductors; high-voltage engineering; power MOSFET; power integrated circuits; silicon; HVIC; WDMOS; back-gate bias effect; bidirectional high voltage PMOSFET; high-voltage integrated circuits; trench gate structure; voltage 65 V; waveform depletion MOS; Bidirectional control; Capacitors; Logic gates; MOSFET circuits; Silicon; Transistors; Wavelength division multiplexing;
Conference_Titel :
Power Semiconductor Devices & IC's (ISPSD), 2014 IEEE 26th International Symposium on
Conference_Location :
Waikoloa, HI
Print_ISBN :
978-1-4799-2917-7
DOI :
10.1109/ISPSD.2014.6856062
