Versatile macromodel for the power supply of submicronic CMOS microprocessors based on voltage down DC-DC converter

Author

Kussener, E. ; Barthélemy, H. ; Malherbe, A. ; Kaiser, A.

Author_Institution

L2MP-ISEM, CNRS, Toulon, France

Volume

5

fYear

2002

fDate

2002

Abstract

A new SPICE macromodel that simulates a microprocessor loading impedance at the power supply is presented. This macro model has been especially created to accelerate the time to market in the design of DC-DC voltage converters used to supply submicronic digital integrated circuits. The proposed macromodel has been successfully compared to measurements for a dedicated test-chip implemented in CMOS 0.35 μm from STM. The test-chip includes a 16 bit microprocessor supplied by a voltage down converter. SPICE simulations and measurements demonstrate the efficiency of the proposed model.

Keywords

CMOS digital integrated circuits; DC-DC power convertors; SPICE; circuit CAD; integrated circuit measurement; integrated circuit modelling; microprocessor chips; 0.35 micron; 16 bit; CMOS sub-micron microprocessors; SPICE macromodel efficiency; SPICE simulations; microprocessor loading impedance simulation; submicronic digital IC; test-chip measurement comparison; voltage down DC-DC converter design; Circuit simulation; Circuit testing; DC-DC power converters; Impedance; Integrated circuit measurements; Microprocessors; Power supplies; SPICE; Semiconductor device modeling; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on

Print_ISBN

0-7803-7448-7

Type

conf

DOI

10.1109/ISCAS.2002.1010830

Filename

1010830