• DocumentCode
    1815118
  • Title

    Evaluating architecture and compiler design through static loop analysis

  • Author

    Kashnikov, Yuriy ; De Oliveira Castro, Pablo ; Oseret, Emmanuel ; Jalby, William

  • Author_Institution
    Exascale Comput. Res., Univ. of Versailles, Versailles, France
  • fYear
    2013
  • fDate
    1-5 July 2013
  • Firstpage
    535
  • Lastpage
    544
  • Abstract
    Using the MAQAO loop static analyzer, we characterize a corpus of binary loops extracted from common benchmark suits such as SPEC, NAS, etc. and several industrial applications. For each loop, MAQAO extracts low-level assembly features such as: integer and floating-point vectorization ratio, number of registers used and spill-fill, number of concurrent memory streams accessed, etc. The distributions of these features on a large representative code corpus can be used to evaluate compilers and architectures and tune them for the most frequently used assembly patterns. In this paper, we present the MAQAO loop analyzer and a characterization of the 4857 binary loops. We evaluate register allocation and vectorization on two compilers and propose a method to tune loop buffer size and stream prefetcher based on static analysis of benchmarks.
  • Keywords
    feature extraction; optimising compilers; program control structures; program diagnostics; software architecture; storage management; MAQAO loop static analyzer; architecture design evaluation; assembly patterns; benchmark suits; binary loops; compiler design evaluation; large representative code corpus; loop buffer size; low-level assembly feature extraction; prefetcher; register allocation evaluation; static loop analysis; vectorization evaluation; Assembly; Benchmark testing; Computer architecture; Measurement; Ports (Computers); Registers; Vectors; Benchmarking and Assessment; HPC Monitoring and Instrumentation; Modeling; Simulation and Evaluation Techniques; Software Monitoring and Measurement;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    High Performance Computing and Simulation (HPCS), 2013 International Conference on
  • Conference_Location
    Helsinki
  • Print_ISBN
    978-1-4799-0836-3
  • Type

    conf

  • DOI
    10.1109/HPCSim.2013.6641465
  • Filename
    6641465