DocumentCode
1815271
Title
Impact of layout and process on RF and analog performances of 3D damascene MIM capacitors
Author
Crémer, S. ; Segura, N. ; Joubin, P. ; Marin, M. ; Thomas, M. ; Richard, C. ; Boret, S. ; Benoit, D. ; Bruyère, S.
Author_Institution
STMicroelectron., Crolles
fYear
2007
fDate
Sept. 30 2007-Oct. 2 2007
Firstpage
242
Lastpage
245
Abstract
RF and analog designs require high performances MIM capacitors. In order to continue the downscaling of MIM devices, we proposed and integrated a 3D damascene MIM capacitor using Si3N4 dielectric in the copper back-end of a 0.13 mum BICMOS technology. Layout and process have been recently optimized to reach excellent reliability performances while keeping very good RF performances.
Keywords
MIM devices; reliability; thin film capacitors; 3D damascene MIM capacitors; BICMOS technology; copper; dielectric; reliability performances; BiCMOS integrated circuits; CMOS technology; Capacitance; Copper; Dielectric materials; Electrodes; MIM capacitors; MIM devices; Radio frequency; Space technology; Dielectric material; MIM Devices; Reliability;
fLanguage
English
Publisher
ieee
Conference_Titel
Bipolar/BiCMOS Circuits and Technology Meeting, 2007. BCTM '07. IEEE
Conference_Location
Boston, MA
ISSN
1088-9299
Print_ISBN
978-1-4244-1019-4
Electronic_ISBN
1088-9299
Type
conf
DOI
10.1109/BIPOL.2007.4351879
Filename
4351879
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