Advanced VLSI circuit simulation using the BSIM

Author

Gowda, Sudhir M. ; Sheu, Bing J. ; Chang, Chen-Hao

Author_Institution

Univ. of Southern California, Los Angeles, CA, USA

fYear

1993

fDate

9-12 May 1993

Abstract

The BSIM plus model, a significantly enhanced version of the widely used BSIM (Berkeley short-channel insulated-gate FET model), is presented. The model uses a compact set of 21 parameters to provide accurate drain current expressions in sub-half-micron transistors. The performance of the model has been demonstrated on several common circuit building blocks, as well as in recently reported innovative circuits such as self-timed circuits. Simulation results on operational amplifier, DRAM (dynamic random-access memory), self-timed adder, and band-gap reference circuits are presented. The model has been implemented in modified versions of the SPICE circuit simulation program and SUXES parameter extraction program

Keywords

integrated circuit modelling; BSIM plus model; Berkeley short-channel insulated-gate FET model; DRAM; SPICE; SUXES parameter extraction program; advanced VLSI circuit simulation; analogue circuits; band-gap reference circuits; drain current expressions; operational amplifier; self-timed adder; self-timed circuits; sub-half-micron transistors; Adders; Circuit simulation; FETs; Insulation; Operational amplifiers; Photonic band gap; Random access memory; SPICE; Transistors; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Custom Integrated Circuits Conference, 1993., Proceedings of the IEEE 1993

Conference_Location

San Diego, CA

Print_ISBN

0-7803-0826-3

Type

conf

DOI

10.1109/CICC.1993.590712

Filename

590712