DocumentCode :
1816308
Title :
Characterization, modeling and minimization of transient threshold voltage shifts in MOSFETs
Author :
Tewksbury, T.L., III ; Lee, H.-S.
Author_Institution :
Analog Devices, Inc., Wilmington, MA, USA
fYear :
1993
fDate :
9-12 May 1993
Abstract :
MOSFETs subjected to large-signal gate-source voltage pulses on microsecond to millisecond time scales exhibit transient threshold voltage shifts which can degrade the accuracy of analog circuits. In the present work, these threshold voltage shifts are characterized with respect to bias conditions, stress time and voltage, temperature, device size, and their relation to 1/f noise. The threshold voltage shifts are explained by a model in which channel charge carriers are exchanged with near-interface oxide traps by tunneling. Techniques for modeling and minimizing errors in circuits are presented
Keywords :
MOSFET; 1/f noise; CMOS; MOSFET; analog circuits; bias conditions; large-signal gate-source voltage pulses; minimizing errors; modeling; near-interface oxide traps; stress time; temperature; transient threshold voltage shifts; tunneling; Analog circuits; Charge carriers; Circuit noise; Degradation; MOSFETs; Minimization; Pulse circuits; Stress; Temperature; Threshold voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference, 1993., Proceedings of the IEEE 1993
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-0826-3
Type :
conf
DOI :
10.1109/CICC.1993.590713
Filename :
590713
Link To Document :
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