Performance optimization of analog integrated circuits by device sizing and its application to pseudosynthesis

A novel integrated approach to multiple criterion constrained performance optimization of analog integrated circuits based on nonlinear programming and heuristic techniques is presented. The deterministic technique used in the optimizer is the MPHS (modified Parkinson-Hutchinson simplex algorithm). New heuristics for step-length calculation, step length modulation, and the use of Biggs´ dominant degree method help to quickly converge to solution when gradient information is available. The GRS technique acts as an efficient intermediate mechanism to help overcome numerical difficulties during gradient-based optimization and to find new feasible subspaces on encountering local minima. The use of this optimization strategy has provided consistent improvements in circuit performance. The new optimizer can be used to verify performance degradation of analog circuits with process variation. Pseudosynthesis of analog circuits offers a practical solution to reducing design cycle time for analog circuit components