A low-power TDMA PCS wireless modem chip in 0.6 μm 3V CMOS

The authors describe an experimental prototype VLSI chip which implements a novel low-overhead burst TDMA (time division multiple access) modulation and demodulation scheme in 0.6-μm 3-V CMOS to achieve very low power performance necessary in portable communications applications. Low-overhead TDMA permits low delay; QPSK (quadrature phase shift keying) or 4-QAM (quadrature amplitude modulation) linear modulation provides good spectral efficiency and robust performance in the presence of noise, interference, and dispersion, while permitting low-complexity digital implementations. Low power is achieved by the use of power-efficient circuit design and layout, with both symbolic custom and symbolic standard cell layout methodologies. A 10:1 power reduction is expected in comparison to an earlier two-chip implementation in 1-μm technology with a silicon compiler approach