• DocumentCode
    1816664
  • Title

    Implicit manipulation of polynomials using zero-suppressed BDDs

  • Author

    Minato, Shin-ichi

  • Author_Institution
    NTT LSI Labs., Kanagawa, Japan
  • fYear
    1995
  • fDate
    6-9 Mar 1995
  • Firstpage
    449
  • Lastpage
    454
  • Abstract
    We present a new technique that broadens the scope of BDD application. It involves manipulating arithmetic polynomials containing higher-degree variables and integer coefficients. Our method can represent large-scale polynomials compactly and uniquely, and it greatly accelerates computation of polynomials. As the polynomial calculus is a basic model in mathematics, our method is very useful in various areas, including formal verification techniques for VLSI design
  • Keywords
    VLSI; circuit CAD; integrated circuit design; polynomials; CAD applications; VLSI design; binary decision diagrams; formal verification techniques; higher-degree variables; implicit manipulation; integer coefficients; polynomials; zero-suppressed BDDs; Acceleration; Arithmetic; Binary decision diagrams; Boolean functions; Calculus; Data structures; Large-scale systems; Mathematical model; Mathematics; Polynomials;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    European Design and Test Conference, 1995. ED&TC 1995, Proceedings.
  • Conference_Location
    Paris
  • Print_ISBN
    0-8186-7039-8
  • Type

    conf

  • DOI
    10.1109/EDTC.1995.470321
  • Filename
    470321