DocumentCode :
1816895
Title :
A novel DFT technique for critical bridging faults in CMOS and BiCMOS ICs
Author :
Favalli, Michele ; Ricco, Bruno ; Penza
Author_Institution :
Dipartimento di Elettronica, Inf. e Sistemistica, Bologna Univ., Italy
fYear :
1995
fDate :
6-9 Mar 1995
Firstpage :
599
Abstract :
This paper presents a technique for on-chip detection of (resistive) Bridging Faults (BFs) in CMOS (and BiCMOS) circuits, that improves the state of the art of testing in the following aspects: 1) compared with off-chip IDDQ testing, it is much faster; 2) compared with on-chip Built-In Current Sensors (BICS), it avoids the use of extra devices in series with the functional circuits; 3) compared with both techniques, it is inherently selective, because it detects only BFs producing extra delays in excess of specified maximum values; 4) it can be used for on-line testing. The method of this work must be applied in addition to functional testing, that takes care of stuck-at and equivalent faults. In the case of buffers, our approach can be slightly modified to also detect stuck-at faults
Keywords :
BiCMOS digital integrated circuits; CMOS digital integrated circuits; automatic testing; design for testability; integrated circuit design; integrated circuit testing; logic testing; BiCMOS IC; CMOS IC; DFT technique; bridging faults; onchip detection; online testing; BiCMOS integrated circuits; Circuit faults; Circuit testing; Degradation; Delay; Fault detection; Inverters; Logic testing; Power supplies; Voltage;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
European Design and Test Conference, 1995. ED&TC 1995, Proceedings.
Conference_Location :
Paris
Print_ISBN :
0-8186-7039-8
Type :
conf
DOI :
10.1109/EDTC.1995.470330
Filename :
470330
Link To Document :
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