A fixed-point MPEG audio processor for low frequency-operation

Author

Yi, Yongseok ; Park, In-Cheol

Author_Institution

Dept. of Electr. Eng. & Comput. Sci., KAIST, Taejon, South Korea

Volume

2

fYear

2002

fDate

2002

Abstract

A fixed-point pipelined processor optimized for decoding MPEG-I audio layer III (MP3) is presented. Various examinations and experiments on the decoding algorithm are exploited to lower the operating frequency. Accordingly, the dynamic scaling method is used to preserve the precision while computing in fixed-point arithmetic. Also, a novel instruction set and an addressing mode tuned for MP3 decoding are presented. The resulting cycle count required to decode a frame is so small that the proposed processor can operate with 12.8 MHz

Keywords

audio signal processing; decoding; digital signal processing chips; fixed point arithmetic; instruction sets; pipeline processing; 12.8 MHz; MP3; MPEG-I audio layer III; addressing mode; cycle count; decoding; dynamic scaling method; fixed-point MPEG audio processor; instruction set; low frequency-operation; operating frequency; pipelined processor; Circuit synthesis; Decoding; Design optimization; Digital audio players; Digital signal processing; Dynamic range; Energy consumption; Fixed-point arithmetic; Frequency; Very large scale integration;

fLanguage

English

Publisher

ieee

Conference_Titel

Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium on

Conference_Location

Phoenix-Scottsdale, AZ

Print_ISBN

0-7803-7448-7

Type

conf

DOI

10.1109/ISCAS.2002.1010984

Filename

1010984