DocumentCode
1817406
Title
Stacked multicell cascaded transformer multilevel inverter
Author
Banaei, M.R. ; Salary, E. ; Ravadanegh, S. Najafi
Author_Institution
Electr. Eng. Dept., Azarbaijan Univ. of Tarbiat Moallem, Tabriz, Iran
fYear
2012
fDate
15-16 Feb. 2012
Firstpage
422
Lastpage
427
Abstract
This paper presents a novel topology for cascade multilevel inverters. This topology consists of series connected sub-multilevel inverters units that each unit can produce five voltage levels. The new topology has the advantage of a reduced number of switching devices and DC sources compared to traditional configurations. Proposed topology can operates in symmetric an asymmetric states. Three algorithms for creating asymmetric states have been presented. The simulation results carried out by MATLAB/SIMULINK.
Keywords
invertors; power transformers; DC sources; MATLAB-SIMULINK; asymmetric states; series connected sub-multilevel inverters; stacked multicell cascaded transformer multilevel inverter; switching devices; symmetric states; voltage levels; Capacitors; Inverters; Asymmetric state; Cascaded transformer; Flying capacitor; Multilevel inverter; Symmetric state;
fLanguage
English
Publisher
ieee
Conference_Titel
Power Electronics and Drive Systems Technology (PEDSTC), 2012 3rd
Conference_Location
Tehran
Print_ISBN
978-1-4673-0111-4
Type
conf
DOI
10.1109/PEDSTC.2012.6183367
Filename
6183367
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