Title :
A new BIST scheme for CMOS PLAs
Author :
Chandramouli, Varun ; Gulati, Ravi K. ; Dandapani, R.
Author_Institution :
Ford Microelectronics, Inc., Colorado Springs, CO, USA
Abstract :
A novel BIST (built-in self-test) design that detects stuck-at, stuck-on, stuck-open, and bridging faults in CMOS PLAs (programmable logic arrays) is presented. IDDQ testing is used for detecting bridging faults. The overhead is comparable to that of existing BIST schemes. The testing can be performed at normal system speed. A PLA-size-independent BIST controller was implemented and tested on a number of industrial PLAs
Keywords :
built-in self test; BIST controller; BIST scheme; CMOS PLAs; DFT; IDDQ testing; bridging faults; logic testing; stuck-at faults; stuck-on faults; stuck-open faults; universal test sequence; Built-in self-test; Circuit faults; Circuit testing; Current supplies; Electrical fault detection; Fault detection; Logic testing; MOS devices; Programmable logic arrays; Shift registers;
Conference_Titel :
Custom Integrated Circuits Conference, 1993., Proceedings of the IEEE 1993
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-0826-3
DOI :
10.1109/CICC.1993.590782
