Modeling soft-error susceptibility for IP blocks

As device geometries continue to shrink, single event upsets are becoming of concern to a wider spectrum of system designers. These "soft errors" can be a nuisance or catastrophic, depending on the application, but they must be understood and their effects budgeted for. Ultimately, experimental measurement is needed to quantify soft error rates, but after-the-fact measurement is too late to make changes. This paper shows a methodology that can be used to estimate the soft error properties of individual IP blocks by using a combination of critical charge calculations and experimental data.