The noisy-leaky integrator model implemented using pRAMs

The theory of the noisy-leaky integrator model of the neuron is presented, and its implementation using pRAMs (probabilistic RAMs) is discussed. Such a neuron is capable of storing temporal patterns of activity within it. With such an ability, a network can be expected to learn about the structure of its environment and thus to exhibit cognitive capacity. The architecture of a noisy-leaky integrator using pRAMs is described with its implementation using digital hardware. The refractory period and synaptic delay times may be modeled, and the level of noise in the system can be adjusted