DocumentCode :
1818222
Title :
STRECH: Self testing reliability evaluation chip
Author :
Mok, Frank K Y ; Cheung, Peter Y K ; Quinlan, Sion ; Strange, Jon
Author_Institution :
Imperial Coll. of Sci. Technol. & Med., London, UK
fYear :
1993
fDate :
9-12 May 1993
Abstract :
An ASIC (application-specific integrated circuit) has been designed to evaluate the reliability of a BiCMOS process for mixed signal ASICs using accelerated life test. The ASIC is built by using standard building blocks that can be found in most mixed signal applications. A built-in digital processor monitors an analog triangle wave output from the analog section of the ASIC so that parametric failures as well as catastrophic failures in the analog section can be detected without the use of expensive external testers
Keywords :
failure analysis; BiCMOS process; STRECH; Self testing reliability evaluation chip; accelerated life test; amplitude histogram analysis; analog triangle wave output; built-in digital processor; catastrophic failures; mixed signal ASIC; parametric failures; phase locked loop block; Application specific integrated circuits; Automatic testing; BiCMOS integrated circuits; Circuit testing; Integrated circuit reliability; Integrated circuit testing; Life estimation; Life testing; Signal design; Signal processing;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Custom Integrated Circuits Conference, 1993., Proceedings of the IEEE 1993
Conference_Location :
San Diego, CA
Print_ISBN :
0-7803-0826-3
Type :
conf
DOI :
10.1109/CICC.1993.590826
Filename :
590826
Link To Document :
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