Title :
A multi-purpose concept for SoC self test including diagnostic features
Author :
Kothe, R. ; Galke, C. ; Vierhaus, H.T.
Author_Institution :
Comput. Eng. Group, Brandenburg Univ. of Technol. Cottbus, Germany
Abstract :
Systems on a chip (SoCs) that combine several processor cores plus multiple interconnects are becoming a standard in advanced technologies. For such systems, a comprehensive test strategy that combines external test and self test capabilities as well as on-line and off-line test is becoming a must in order to manage fault mechanisms that are expected for deep sub-micron technologies. Recently, we have developed a hierarchical test concept for SoCs that relies on a test processor as a "hard core". This paper describes an advanced test concept that may serve to support off-line self test as well as advanced on-line test, also including fault diagnosis features.
Keywords :
built-in self test; fault diagnosis; microprocessor chips; system-on-chip; SoC self test; deep sub-micron technology; fault diagnosis; fault mechanisms; off-line test; on-line test; processor cores; systems on a chip; Automatic testing; Built-in self-test; Circuit testing; Fault diagnosis; Integrated circuit interconnections; Logic testing; Process design; Production; System testing; System-on-a-chip;
Conference_Titel :
On-Line Testing Symposium, 2005. IOLTS 2005. 11th IEEE International
Print_ISBN :
0-7695-2406-0
DOI :
10.1109/IOLTS.2005.7
