• DocumentCode
    1818670
  • Title

    Radiation induced single-word multiple-bit upsets correction in SRAM

  • Author

    Gill, Balkaran ; Nicolaidis, Michael ; Papachristou, Chris

  • Author_Institution
    Dept. of EECS, Case Western Reserve Univ., Cleveland, OH, USA
  • fYear
    2005
  • fDate
    6-8 July 2005
  • Firstpage
    266
  • Lastpage
    271
  • Abstract
    In this paper, the authors introduced an approach for single-word multiple-bit upsets (SMU) correction in SRAM. This approach uses the combination of built in current sensor (BICS) and Hamming single error correction/double error detection (SEC/DED) codes. The BICS is used with memory columns for online detection of upsets. When the upset is detected by the BICS, an immediate error correction is performed by the ECC. If ECC gives flag for uncorrectable error i.e. double or more errors in single word, then information from BICS is used to invert the data read from columns flagged by the BICS.
  • Keywords
    Hamming codes; SRAM chips; built-in self test; error correction; error detection; Hamming codes; SRAM; built in current sensor; memory columns; online detection; radiation induced single word multiple bit upsets correction; single error correction/double error detection; Error correction; Error correction codes; Logic; Microprocessors; Random access memory; Single event transient; Single event upset; Space technology; System-on-a-chip; Very large scale integration;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    On-Line Testing Symposium, 2005. IOLTS 2005. 11th IEEE International
  • Print_ISBN
    0-7695-2406-0
  • Type

    conf

  • DOI
    10.1109/IOLTS.2005.59
  • Filename
    1498172