• DocumentCode
    1818907
  • Title

    Strategic use of SEE mitigation techniques for the development of the ESA microprocessors: past, present, and future

  • Author

    Pouponnot, André L R

  • Author_Institution
    Eur. Space Agency, ESTEC, Noordwijk, Netherlands
  • fYear
    2005
  • fDate
    6-8 July 2005
  • Firstpage
    319
  • Lastpage
    323
  • Abstract
    For the past 15 years the European Space Agency (ESA) has developed four generations of microprocessors for their reliable use in space applications. The main design constraint was the space radiation environment with its two main components: the total ionizing dose (TID) and single event effects (SEE). The sensitivity of the CMOS technology to these two radiation components has evolved with the geometry shrinking. The higher SEE sensitivity of the narrow geometry that is used today has become the main design constraint. This paper describes the design approaches that have been used for the successive generations of ESA space microprocessors to cope with the increasing SEE sensitivity of modern CMOS technology and briefly addresses what are the concerns for the future.
  • Keywords
    avionics; microprocessor chips; radiation effects; semiconductor device manufacture; SEE mitigation techniques; microprocessors; single event effects; space applications; total ionizing dose; CMOS technology; Circuits; Energy consumption; Flip-flops; Frequency; Geometry; Ionizing radiation; Microprocessors; Single event upset; Space technology;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    On-Line Testing Symposium, 2005. IOLTS 2005. 11th IEEE International
  • Print_ISBN
    0-7695-2406-0
  • Type

    conf

  • DOI
    10.1109/IOLTS.2005.66
  • Filename
    1498182