DocumentCode
1818965
Title
2005 IEEE International Workshop on Memory Technology, Design and Testing
fYear
2005
fDate
3-5 Aug. 2005
Abstract
The following topics are dealt with: nonvolatile memories; new memory devices; design and test of DRAMs; built-in self test; memory test and repair; SRAM design and characterization.
Keywords
CMOS logic circuits; CMOS memory circuits; DRAM chips; built-in self test; embedded systems; integrated circuit testing; read-only storage; DRAM; SRAM; built in self test; dynamic random access memory; embedded memories; memory devices; nonvolatile memories;
fLanguage
English
Publisher
ieee
Conference_Titel
Memory Technology, Design, and Testing, 2005. MTDT 2005. 2005 IEEE International Workshop on
Conference_Location
Taipei
ISSN
1087-4852
Print_ISBN
0-7695-2313-7
Type
conf
DOI
10.1109/MTDT.2005.4
Filename
1498185
Link To Document