A simulation model for floating-gate MOS synapse transistors

We propose an empirical simulation model for p-channel floating-gate MOS synapse transistors. Since our model requires only a transistor and controlled sources, and does not use the MOSFET´s channel potential in its description, we can apply the model in any SPICE circuit simulator. The model parameters derive from simple oxide-current measurements. We present fit parameters from MOSFETs with 70 Å oxides in a 0.35 μm process, and verify our model by comparing simulations and measured data from a capacitive-feedback CMOS operational amplifier.