Title :
A novel CMOS compatible embedded nonvolatile memory with zero process adder
Author :
Breitwisch, Matthew J. ; Lam, Chung H. ; Johnson, Jeffrey B. ; Mittl, Steven W. ; Zhu, Jian W.
Author_Institution :
IBM Res. Div., Yorktown Heights, NY, USA
Abstract :
We demonstrate a CMOS compatible reprogrammable nonvolatile memory cell using a regular n-channel MOSFET with under-lapped source/drain diffusions that requires no extra processing steps in a standard 130nm CMOS logic technology. Experimental results indicate good endurance and retention characteristics. A strategy for optimizing programming efficiency is identified with the addition of one extra mask to introduce drain optimization implants.
Keywords :
CMOS logic circuits; MOSFET circuits; adders; random-access storage; 130 nm; CMOS logic technology; MOSFET; drain optimization; endurance characteristics; reprogrammable nonvolatile memory cell; retention characteristics; under-lapped source/drain diffusions; zero process adder; CMOS logic circuits; CMOS process; CMOS technology; Conferences; Implants; MOSFET circuits; Microelectronics; Nonvolatile memory; Space technology; Threshold voltage;
Conference_Titel :
Memory Technology, Design, and Testing, 2005. MTDT 2005. 2005 IEEE International Workshop on
Conference_Location :
Taipei
Print_ISBN :
0-7695-2313-7
DOI :
10.1109/MTDT.2005.12
