• DocumentCode
    1819605
  • Title

    Speedup and buffer division in input/output queueing ATM switches

  • Author

    Xie, Jiang ; Lea, Chin-Tau

  • Author_Institution
    Dept. of Electr. & Electron. Eng., Hong Kong Univ. of Sci. & Technol., Hong Kong
  • fYear
    1999
  • fDate
    1999
  • Firstpage
    49
  • Abstract
    The capacity of a switch is built out of two factors: space parallelism and speedup. A switch has space parallelism if more than one input port can transmit at any point of time. Speedup is defined to be the speed ratio of the speed of the switch´s internal link over that of the incoming link. To build a switch of the same capacity, we can use less space parallelism (the space factor) but more speedup (the time factor), or vice versa. This paper studies how the different (space, time) implementations affect the optimum buffer division between the input and the output queues
  • Keywords
    asynchronous transfer mode; buffer storage; queueing theory; buffer division; capacity; incoming link; input queues; input/output queueing ATM switches; internal link; optimum buffer division; output queues; space parallelism; speed ratio; speedup; Asynchronous transfer mode; Routing; Space technology; Switches; Telecommunication switching; Throughput; Time factors;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Global Telecommunications Conference, 1999. GLOBECOM '99
  • Conference_Location
    Rio de Janeireo
  • Print_ISBN
    0-7803-5796-5
  • Type

    conf

  • DOI
    10.1109/GLOCOM.1999.831606
  • Filename
    831606