DocumentCode
1819644
Title
GPU_CPU based parallel architecture for reduction in power consumption
Author
Xiang Jun Zhao ; MeiZhen Yu ; Yong Beom Cho
Author_Institution
Dept. of Electron. Eng., Konkuk Univ., Seoul, South Korea
fYear
2012
fDate
18-20 Nov. 2012
Firstpage
182
Lastpage
185
Abstract
Real-time and power management are required for high quality video in mobile environment. This paper presents a GPU(graphics processing unit) based parallel architecture for Multi-view Video (MVC) decoder which reaches these requirements. The 3D video based on stereo or multi-view representation is becoming widely popular. Real-time decoding of such video is an important concern as the number and spatial/temporal resolution of views increase. Significant improvement in video compression capability has been demonstrated by using H.264/Advanced Video Coding (AVC) standard. Multi-view video (MVC) is the extension of H.264/ AVC. In this paper, we proposed MVC decoder architecture based on parallel combination of Cortex-A8 processor and GPU (graphics processing unit). The basic operations are performed by the processor while the motion compensation (MC) feedback loop of the decoder is moved to GPU in order to achieve decoding efficiently. The experimental results show that compared to general implementation, the proposed parallel processing of a particular task in an embedded system can reconstruct the target images with higher quality with reduced processing time and energy saving with almost the same compression performance.
Keywords
embedded systems; graphics processing units; image reconstruction; image representation; image resolution; mobile computing; motion compensation; parallel architectures; power aware computing; video coding; AVC standard; Cortex-A8 processor; GPU-CPU based parallel architecture; H.264 standard; MC feedback loop; MVC decoder; advanced video coding standard; central processing unit; compression performance; embedded system; graphics processing unit; high quality video; mobile environment; motion compensation; multiview representation; multiview video decoder; parallel processing; power consumption reduction; power management; spatial-temporal view resolution; stereo image processing; GPU(graphics processing unit); Multi-view Video Decoder; Parallel architecture; Power estimation;
fLanguage
English
Publisher
ieee
Conference_Titel
Global High Tech Congress on Electronics (GHTCE), 2012 IEEE
Conference_Location
Shenzhen
Print_ISBN
978-1-4673-5086-0
Type
conf
DOI
10.1109/GHTCE.2012.6490152
Filename
6490152
Link To Document