DocumentCode
1819667
Title
C-V parameter extraction technique for characterisation the diffused junctions of semiconductor devices
Author
Cristea, Miron J. ; Babarada, Florin
Author_Institution
Dept. Devices Components & Electron. Apparatus, Politeh. Univ. of Bucharest, Bucharest
Volume
2
fYear
2008
fDate
13-15 Oct. 2008
Firstpage
335
Lastpage
338
Abstract
Considering the Gaussian model for the diffused junctions and beginning with the electric charge density equation applied for the semiconductor junctions, new relations for the depletion region width and barrier capacitance were obtained. Based on these relations, a new C-V method to extract the parameters of semiconductor devices, respectively of semiconductor junctions is presented. A very good agreement was obtained between the theoretical model and experimental data. This technique can be applied to many semiconductor devices with diffused junctions, like p-n diodes, bipolar transistors, thyristors, IGBTs.
Keywords
Gaussian processes; capacitance; semiconductor junctions; C-V parameter extraction; Gaussian model; barrier capacitance; capacitance-voltage characteristic; depletion region width; diffused junction; electric charge density equation; semiconductor device; semiconductor junction; Bipolar transistors; Capacitance; Capacitance-voltage characteristics; Data mining; Equations; P-n junctions; Parameter extraction; Semiconductor devices; Semiconductor diodes; Thyristors; characterization; design; modelling; optimization; simulation;
fLanguage
English
Publisher
ieee
Conference_Titel
Semiconductor Conference, 2008. CAS 2008. International
Conference_Location
Sinaia
ISSN
1545-827X
Print_ISBN
978-1-4244-2004-9
Type
conf
DOI
10.1109/SMICND.2008.4703419
Filename
4703419
Link To Document