Title :
Experimental results for slow-speed testing
Author :
Tseng, Chao-Wen ; Li, James ; McCluskey, Edward J.
Author_Institution :
Departments of Electr. Eng. & Comput. Sci., Stanford Univ., CA, USA
Abstract :
This paper presents slow-speed testing results for two test chip experiments at Stanford CRC: Murphy and ELF35. The test speed for slow-speed testing is 1/3 of the characterized speed, at which the circuit-under-test (CUT) can operate. At nominal supply voltage, 3 out the 116 defective Murphy CUTs escaped slow-speed testing. In the ELF35 experiment, I out of the 218 defective combinational CUTs escaped slow-speed testing. The experimental data also show that the number of test escapes depends more on the quality of the applied test sets, than on the test speed at which the test sets were applied We also evaluated the effectiveness of VLV testing at characterized speed. Our results show that it missed only one defective Murphy CUT. It detected all the defective ELF35 combinational CUTs. The one defective Murphy CUT that escaped VLV testing at characterized speed is a suspected resistive open. Schmoo characterization results show it can be detected by VLV testing at characterized speed if lot-to-lot re-characterization is done to determine the VLV testing speed.
Keywords :
CMOS logic circuits; combinational circuits; fault diagnosis; integrated circuit testing; logic testing; low-power electronics; CMOS circuit; ELF35 test chip; LSI Logic LFT150K technology; Murphy test chip; Schmoo characterization; Stanford CRC; VLV testing; defective Murphy CUTs; defective combinational CUTs; lot-to-lot recharacterization; resistive open; single stuck-at fault coverage; slow-speed testing; test chip experiments; test escapes; test speed; transition fault coverage; Chaos; Circuit faults; Circuit testing; Cyclic redundancy check; Delay; Large scale integration; Logic testing; Manufacturing; Timing; Voltage;
Conference_Titel :
VLSI Test Symposium, 2002. (VTS 2002). Proceedings 20th IEEE
Print_ISBN :
0-7695-1570-3
DOI :
10.1109/VTS.2002.1011108