A multi-channel ADC for use in the PHENIX detector

Author

Emery, M.S. ; Frank, S.S. ; Britton, C.L., Jr. ; Wintenberg, A.L. ; Simpson, M.L. ; Ericson, M.N. ; Young, G.R. ; Clonts, L.G. ; Allen, M.D.

Author_Institution

Oak Ridge Nat. Lab., TN, USA

Volume

1

fYear

1996

fDate

2-9 Nov 1996

Firstpage

417

Abstract

A custom CMOS analog to digital converter was designed and a prototype 8-channel ADC ASIC was fabricated in a 1.2 μm process. The circuit uses a Wilkinson-type architecture which is suitable for use in multi-channel applications such as the PHENIX detector. The ADC design features include a differential positive-ECL input for the high speed clock and selectable control for 11 or 12-bit conversions making it suitable for use in multiple PHENIX subsystems. Circuit topologies and ASIC layout specifics, including power consumption, maximum clock speed, INL, and DNL are discussed. The ADC performed to 11-bit accuracy

Keywords

CMOS integrated circuits; analogue-digital conversion; application specific integrated circuits; detector circuits; nuclear electronics; 1.2 mum; 8-channel ADC ASIC; ADC design; ASIC layout specifics; PHENIX detector; Wilkinson-type architecture; custom CMOS analog to digital converter; maximum clock speed; multi-channel applications; multiple PHENIX subsystems; power consumption; Analog-digital conversion; Application specific integrated circuits; Clocks; Counting circuits; Detectors; Laboratories; Latches; Reflective binary codes; Signal generators; Voltage;

fLanguage

English

Publisher

ieee

Conference_Titel

Nuclear Science Symposium, 1996. Conference Record., 1996 IEEE

Conference_Location

Anaheim, CA

ISSN

1082-3654

Print_ISBN

0-7803-3534-1

Type

conf

DOI

10.1109/NSSMIC.1996.591015

Filename

591015