Title :
A self calibrated ADC BIST methodology
Author :
Chen, Hung-Kai ; Wang, Chih-Hu ; Su, Chau-Chin
Author_Institution :
Dept. of Electr. Eng., Nat. Central Univ., Chung-li, Taiwan
Abstract :
A self calibrated BIST methodology is proposed to overcome the process variation of the BIST circuitry. Two test methods are proposed, one by statistical analysis and another by curve fitting. Test hardware is built by discrete components to emulate the ADC BIST circuitry. Experimental results verify the feasibility of the methodology.
Keywords :
analogue-digital conversion; application specific integrated circuits; built-in self test; calibration; curve fitting; integrated circuit testing; statistical analysis; analog/digital conversion modules; curve fitting; discrete components; feasibility; process variation; self calibrated BIST methodology; statistical analysis; system on chip; test hardware; test methods; Automatic testing; Built-in self-test; Calibration; Circuit testing; Digital signal processing; Hardware; Harmonic analysis; Linearity; Quadrature amplitude modulation; Signal processing algorithms;
Conference_Titel :
VLSI Test Symposium, 2002. (VTS 2002). Proceedings 20th IEEE
Print_ISBN :
0-7695-1570-3
DOI :
10.1109/VTS.2002.1011121
